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W25Q64JW_DTR 1.8V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI & DTR Publication Release Date: November 04, 2019 -Revision B W25Q64JW_DTR Table of Contents 1. GENERAL DESCRIPTIONS ........................................................................................................ 5 2. FEATURES ................................................................................................................................. 5 3. PACKAGE TYPES AND PIN CONFIGURATIONS ...................................................................... 6 4. 3.1 Pin Configuration SOIC 208-mil ....................................................................................... 6 3.2 Pad Configuration WSON 6x5-mm/ 8x6-mm, XSON 4x4-mm, USON 4x3-mm ................ 6 3.3 mm Pin Description SOIC 208-mil, WSON 6x5-mm/ 8x6-mm, XSON 4x4-mm, USON 4x36 3.4 Ball Configuration TFBGA 8x6-mm (5x5 Ball Array) ......................................................... 7 3.5 Ball Description TFBGA 8x6-mm ..................................................................................... 7 3.6 Ball Configuration WLCSP ............................................................................................... 8 3.7 Ball Description WLCSP12 .............................................................................................. 8 PIN DESCRIPTIONS ................................................................................................................... 9 4.1 Chip Select (/CS) ............................................................................................................. 9 4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ................................. 9 4.3 Write Protect (/WP).......................................................................................................... 9 4.4 HOLD (/HOLD) ................................................................................................................ 9 4.5 Serial Clock (CLK) ........................................................................................................... 9 4.6 Reset (/RESET) ............................................................................................................... 9 5. BLOCK DIAGRAM .................................................................................................................... 11 6. FUNCTIONAL DESCRIPTIONS ................................................................................................ 12 6.1 6.2 SPI / QPI Operations ..................................................................................................... 12 6.1.1 Standard SPI Instructions ..................................................................................................... 12 6.1.2 Dual SPI Instructions ............................................................................................................ 12 6.1.3 Quad SPI Instructions ........................................................................................................... 13 6.1.4 QPI Instructions .................................................................................................................... 13 6.1.5 SPI / QPI DTR Read Instructions .......................................................................................... 13 6.1.6 Hold Function ....................................................................................................................... 13 6.1.7 Software Reset & Hardware /RESET pin ............................................................................. 14 Write Protection ............................................................................................................. 15 6.2.1 7. Write Protect Features ......................................................................................................... 15 STATUS AND CONFIGURATION REGISTERS ........................................................................ 17 7.1 Status Registers ............................................................................................................ 17 7.1.1 Erase/Write In Progress (BUSY) – Status Only ................................................................ 17 7.1.2 Write Enable Latch (WEL) – Status Only ......................................................................... 17 -1- W25Q64JW_DTR 8. 7.1.3 Block Protect Bits (BP2, BP1, BP0) – Volatile/Non-Volatile Writable ............................... 17 7.1.4 Top/Bottom Block Protect (TB) – Volatile/Non-Volatile Writable ...................................... 18 7.1.5 Sector/Block Protect Bit (SEC) – Volatile/Non-Volatile Writable ...................................... 18 7.1.6 Complement Protect (CMP) – Volatile/Non-Volatile Writable ........................................... 18 7.1.7 Status Register Protect (SRP, SRL)..................................................................................... 19 7.1.8 Erase/Program Suspend Status (SUS) – Status Only ...................................................... 20 7.1.9 Security Register Lock Bits (LB3, LB2, LB1) – Volatile/Non-Volatile OTP Writable ......... 20 7.1.10 Quad Enable (QE) – Volatile/Non-Volatile Writable ........................................................ 20 7.1.11 Write Protect Selection (WPS) – Volatile/Non-Volatile Writable .................................... 21 7.1.12 Output Driver Strength (DRV1, DRV0) – Volatile/Non-Volatile Writable ......................... 22 7.1.13 /HOLD or /RESET Pin Function (HOLD/RST) – Volatile/Non-Volatile Writable .............. 22 7.1.14 Reserved Bits – Non Functional...................................................................................... 22 7.1.15 W25Q64JW Status Register Memory Protection (WPS = 0, CMP = 0) ............................ 23 7.1.16 W25Q64JW Status Register Memory Protection (WPS = 0, CMP = 1) ............................ 24 7.1.17 W25Q64JW Individual Block Memory Protection (WPS=1) .............................................. 25 INSTRUCTIONS ........................................................................................................................ 26 8.1 Device ID and Instruction Set Tables ............................................................................. 26 8.1.1 8.2 Manufacturer and Device Identification ................................................................................ 26 8.1.2 Instruction Set Table 1 (Standard SPI Instructions) 8.1.3 (1) ........................................................... 27 Instruction Set Table 2 (Dual/Quad SPI Instructions) (1) ......................................................... 28 8.1.4 Instruction Set Table 3 (QPI Instructions)(12) ......................................................................... 29 8.1.5 Instruction Set Table 4 (DTR with SPI Instructions).............................................................. 30 8.1.6 Instruction Set Table 5 (DTR with QPI Instructions) ............................................................. 30 Instruction Descriptions.................................................................................................. 32 8.2.1 Write Enable (06h) ............................................................................................................... 32 8.2.2 Write Enable for Volatile Status Register (50h) ................................................................... 32 8.2.3 Write Disable (04h) .............................................................................................................. 33 8.2.4 Read Status Register-1 (05h), Status Register-2 (35h) & Status Register-3 (15h) .............. 33 8.2.5 Write Status Register-1 (01h), Status Register-2 (31h) & Status Register-3 (11h) .............. 34 8.2.6 Read Data (03h) ................................................................................................................... 38 8.2.7 Fast Read (0Bh) ................................................................................................................... 39 8.2.8 DTR Fast Read (0Dh) ........................................................................................................... 41 8.2.9 Fast Read Dual Output (3Bh) ............................................................................................... 43 8.2.10 Fast Read Quad Output (6Bh) ............................................................................................ 44 8.2.11 Fast Read Dual I/O (BBh) ................................................................................................... 45 8.2.12 DTR Fast Read Dual I/O (BDh)........................................................................................... 47 8.2.13 Fast Read Quad I/O (EBh).................................................................................................. 49 8.2.14 DTR Fast Read Quad I/O (EDh) ......................................................................................... 51 8.2.15 Set Burst with Wrap (77h) .................................................................................................. 55 -2- Publication Release Date: November 04, 2019 -Revision B W25Q64JW_DTR 9. 8.2.16 Page Program (02h) ........................................................................................................... 56 8.2.17 Quad Input Page Program (32h) ........................................................................................ 58 8.2.18 Sector Erase (20h) ............................................................................................................. 59 8.2.19 32KB Block Erase (52h) ..................................................................................................... 60 8.2.20 64KB Block Erase (D8h) .................................................................................................... 61 8.2.21 Chip Erase (C7h / 60h) ....................................................................................................... 63 8.2.22 Erase / Program Suspend (75h) ......................................................................................... 64 8.2.23 Erase / Program Resume (7Ah) ......................................................................................... 66 8.2.24 Power-down (B9h) .............................................................................................................. 67 8.2.25 Release Power-down / Device ID (ABh) ............................................................................. 69 8.2.26 Read Manufacturer / Device ID (90h) ................................................................................. 71 8.2.27 Read Manufacturer / Device ID Dual I/O (92h) ................................................................... 72 8.2.28 Read Manufacturer / Device ID Quad I/O (94h) .................................................................. 73 8.2.29 Read Unique ID Number (4Bh)........................................................................................... 75 8.2.30 Read JEDEC ID (9Fh) ........................................................................................................ 76 8.2.31 Read SFDP Register (5Ah) ................................................................................................ 77 8.2.32 Erase Security Registers (44h)........................................................................................... 78 8.2.33 Program Security Registers (42h) ...................................................................................... 79 8.2.34 Read Security Registers (48h) ........................................................................................... 80 8.2.35 Set Read Parameters (C0h) ............................................................................................... 81 8.2.36 Burst Read with Wrap (0Ch) .............................................................................................. 82 8.2.37 DTR Burst Read with Wrap (0Eh) ...................................................................................... 83 8.2.38 Enter QPI Mode (38h) ......................................................................................................... 84 8.2.39 Exit QPI Mode (FFh) ........................................................................................................... 85 8.2.40 Individual Block/Sector Lock (36h) ..................................................................................... 86 8.2.41 Individual Block/Sector Unlock (39h) .................................................................................. 87 8.2.42 Read Block/Sector Lock (3Dh) ........................................................................................... 88 8.2.43 Global Block/Sector Lock (7Eh) ......................................................................................... 89 8.2.44 Global Block/Sector Unlock (98h) ...................................................................................... 89 8.2.45 Enable Reset (66h) and Reset Device (99h) ...................................................................... 90 ELECTRICAL CHARACTERISTICS .......................................................................................... 91 9.1 Absolute Maximum Ratings (1) ...................................................................................... 91 9.2 Operating Ranges.......................................................................................................... 91 9.3 Power-Up Power-Down Timing and Requirements ......................................................... 92 9.3.1 Power Cycle Requirement.................................................................................................... 93 9.4 DC Electrical Characteristics .......................................................................................... 94 9.5 AC Measurement Conditions ......................................................................................... 95 9.6 AC Electrical Characteristics(5) ....................................................................................... 96 9.7 Serial Output Timing ...................................................................................................... 98 -3- W25Q64JW_DTR 10. 11. 9.8 Serial Input Timing ......................................................................................................... 98 9.9 /HOLD Timing ................................................................................................................ 98 9.10 /WP Timing.................................................................................................................... 98 PACKAGE SPECIFICATIONS .................................................................................................. 99 10.1 8-Pin SOIC 208-mil (Package Code SS) ........................................................................ 99 10.2 8-Pad USON 4x3-mm (Package Code UU) .................................................................. 100 10.3 8-Pad XSON 4x4x0.45-mm (Package Code XG) ......................................................... 101 10.4 8-Pad WSON 6x5-mm (Package Code ZP) ................................................................. 102 10.5 8-Pad WSON 8x6-mm (Package Code ZE) ................................................................. 103 10.6 24-Ball TFBGA 8x6-mm (Package Code TB, 5x5-1 ball array)...................................... 104 10.7 12-Ball WLCSP (Package Code BY) ............................................................................ 105 ORDERING INFORMATION.................................................................................................... 106 11.1 12. Valid Part Numbers and Top Side Marking .................................................................. 108 REVISION HISTORY............................................................................................................... 109 -4- Publication Release Date: November 04, 2019 -Revision B W25Q64JW_DTR 1. GENERAL DESCRIPTIONS The W25Q64JW (64M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single W25Q64JW power supply with current consumption as low as 1mA active and 0.1µA for power-down. All devices are offered in spacesaving packages. The W25Q64JWarray is organized into 32,768 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q64JWhas 1,024 erasable sectors and 64 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See Figure 2) The W25Q64JW supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2, and I/O3. SPI clock frequencies of up to 133MHz are supported allowing equivalent clock rates of 532MHz (133MHz x 4) for Quad I/O when using the SPI Fast Read Quad I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification, a 64-bit Unique Serial Number and four 256-bytes Security Registers. 2. FEATURES  New Family of SpiFlash Memories – W25Q64JW: 64M-bit / 8M-byte – Standard SPI: CLK, /CS, DI, DO, /WP, /Hold – Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3 – QPI: CLK, /CS, IO0, IO1, IO2, IO3 – SPI/QPI DTR(Double Transfer Rate) Read – Software & Hardware Reset(1)  Highest Performance Serial Flash – 133MHz Quad I/O SPI clocks – 66MB/S continuous data transfer rate – Min. 100K Program-Erase cycles – More than 20-year data retention  “Read Command Bypass” and QPI Mode – Read Command Bypass with Wrap – As few as 8 clocks to address memory – Quad Peripheral Interface (QPI) reduces instruction overhead – Allows true XIP (execute in place) operation – Outperforms X16 Parallel Flash  Low Power, Wide Temperature Range – Vcc:1.7~1.95V,-40~85℃ – 1mA active current,